1. Field of the Invention
The invention relates to a die bumping process, and more particularly, to an integrated die bumping process which integrates dice of different die specifications on a same load board for simultaneously performing a die bumping process.
2. Description of the Prior Art
The flip-chip technology is an advanced semiconductor fabrication technology that allows the overall package size to be made very compact. The flip-chip package configuration differs from conventional ones particularly in that the semiconductor chip is mounted in an upside-down manner on a substrate and electrically coupled to the same by means of solder bumps provided on the active surface of the semiconductor chip. Since no bonding wires are required, the overall size of the flip-chip package can be made very compact as compared to conventional types of package configurations. Therefore, it is a trend recently to manufacture semiconductor chips with wafer bumping processes.
During the early development stage before semiconductor chips mass production, different semiconductor chips to be manufactured utilize a silicon shuttle service provided by United Microelectronics Corp. (UMC). Silicon shuttle service is capable of manufacturing dice of different uses and specifications on a same wafer simultaneously to reduce production costs and shorten the cycle time. However, semiconductor chips that require die bumping processes of the flip-chip package configuration are not well suited for being manufactured by the silicon shuttle service since the respective mask expenses of wafer bumping processes need to be considered. If these semiconductor chips further perform wafer bumping processes or single die bumping separately after completing silicon shuttle service and dicing, higher costs, more complicated processes and longer cycle times will be needed, and the bump size will be restricted.